12th ACM SIGPLAN Workshop on Transactional Computing / 2017 Workshop on the Theory of Transactional MemoryTRANSACT 2017

The past decade has seen an explosion of interest in programming languages, systems, and hardware to support transactions, speculation, and related alternatives to classical lock-based concurrency. Recently, transactional memory has crossed two important thresholds. First, IBM and Intel are now shipping processors with hardware support for transactional memory (TM). Second, the C++ Standard Committee has been working intensively to integrate TM as a new language feature. On the other hand, the post-release discovery of an erratum in Intel’s hardware TM implementation has brought upfront the need for effective TM verification mechanisms. Overall, these developments highlight the demand for continued high quality transactional memory research.

In 2017, Transact will be merged with the Workshop on the Theory of Transactional Memory (WTTM); this will mark the twelfth Transact and ninth WTTM. Transact 2017, will provide a forum to present and discuss the latest research on all aspects of transactional computing. The scope of the workshop is intentionally broad, with the goal of encouraging interaction across the languages, architecture, systems, database, and theory communities. Papers may address implementation techniques, foundational results, applications and workloads, or experience with working systems. Environments of interest include the full range from multithreaded or multicore processors to high-end parallel and distributed computing platforms.

More information available at: http://transact2017.cse.lehigh.edu/

Call for Papers

Submission Deadline: December 2, 2016
Author Notification: January 19, 2017
Workshop: June 15 - 16, 2015 (Monday and Tuesday)

More information available at: http://transact2017.cse.lehigh.edu/